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Sittel, Patrick
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Sittel, Patrick
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Sittel
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search.filters.author.Fiege, Nicolai
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search.filters.subject.004
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search.filters.subject.409-07 Rechnerarchitekturen und eingebettete Systeme
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search.filters.subject.Energy efficiency
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search.filters.subject.High-Level Synthesis
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search.filters.subject.Scheduling
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search.filters.kaFaculty.FB16:Elektrotechnik/Informatik
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Improving Energy Efficiency in Loop Pipelining by Rational-II Modulo Scheduling
Fiege, Nicolai
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Sittel, Patrick
;
Zipf, Peter
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